a-data a d ecb1608 rev i sion history r e v i sion 1 ( d ec. 2001 ) 1.f i s t er r e leas e. r e v i sion 2 ( a p r . 2002 ) 1. changed m odule c u r r ent s pec if ic ation. 2. add per f or m anc e r ange. 3. c hanged ac c haracteristics. 4. c hanged ty po siz e on module pc b in package dimensions. rev 2 apr . 2002 1
a-data a d ecb1608 ddr sdra m 200pin dimm 16m x64bit s ddr sdra m 200pin so dim m based on 16m x8 performance range general d escript i on t he ad ec b1608 is 16m x 64 bit s d ouble d a t a r a te sd r a m m odules, t he modules are composed of eight 16m x 8 bit s c m o s d ouble d a t a r a te sd r a m s in t s o p -ii 400mil 66pin p a ckage and one 2kbit eepro m in 8pin t sso p(t s o p ) p a ckage on a 200pin glass?epox y printed circuit board. t he a-d a t a is a d ual in-line m e mory m odule and is intended for mounting onto 200-pins edge connector socket s . sy nchronous design allow s precise cy cle control w i th the use of sy stem clock. d a t a i/o transactions are possible on both edges of d q s. r ange of operating frequencies, programmable latencies and burst lengths allow the same dev ice to be useful for a v a riety of high bandw id th, high performance memory sy stem applications. feat ures ? d l l aligns d q and d q s transition w i th c k transition ? d ouble-dat a-rate architecture. ? bi-directional dat a strobe (d q s ) ? d i f f erential clock input s(c k and /c k) ? auto refresh and self refresh ? 4096 refresh cy cles / 64ms ? pow e r supply : vdd,vddq:2.5v 0.2v ? programmable burst length (2,4,8) ? serial pres enc e detec t w i th eeprom ? m odule bank : one phy sical bank ? pc b : so 200r c b ,h eight (12.5mm),single sided component, six lay e rs part no. m a x freq. interface ad ec b1608-75b 133m h z (7.5ns /c l=2.5) sst l_2 pin a ssignment front side back side p i n n a m e pin nam e pin nam e pin nam e pin nam e pin nam e pin nam e pin nam e 1 v r e f 2 6 dm 1 5 1 v s s 7 6 vss 101 a 9 126 vss 151 d q 4 2 1 7 6 dq55 2 v r e f 2 7 v s s 5 2 v s s 7 7 dqs8 102 a 8 127 dq32 152 d q 4 6 1 7 7 d q 5 6 3 v s s 2 8 v s s 5 3 d q 1 9 78 dm 8 103 vss 128 dq36 153 d q 4 3 1 7 8 d q 6 0 4 v s s 2 9 d q 1 0 5 4 d q 2 3 7 9 cb2 104 vss 129 dq33 154 d q 4 7 1 7 9 vdd 5 d q 0 3 0 d q 1 4 5 5 d q 2 4 8 0 c b 6 105 a 7 130 d q 37 155 vd d 1 8 0 vd d 6 d q 4 3 1 d q 1 1 5 6 d q 2 8 8 1 vd d 106 a 6 131 vd d 156 vd d 1 8 1 d q 57 7 d q 1 3 2 d q 1 5 5 7 v d d 8 2 vd d 107 a 5 132 vd d 157 vd d 1 8 2 d q 61 8 d q 5 3 3 v d d 5 8 v d d 8 3 vbs3 108 a4 1 3 3 dqs4 158 / c k 1 1 8 3 dqs7 9 v d d 3 4 v d d 5 9 d q 2 5 84 cb7 109 a 3 134 dm 4 159 v s s 1 8 4 dm 7 1 0 v d d 3 5 c k 0 6 0 d q 2 9 85 d u 1 1 0 a 2 135 d q 34 160 c k 1 1 8 5 vss 1 1 d q s 0 3 6 v d d 6 1 d q s 3 8 6 d u 1 1 1 a 1 136 dq38 161 v s s 1 8 6 vss 1 2 dm 0 3 7 / c k 0 6 2 dm 3 8 7 vss 1 1 2 a 0 137 vss 162 v s s 1 8 7 dq58 1 3 d q 2 3 8 v s s 6 3 v s s 8 8 vss 1 1 3 v dd 138 vss 163 d q 4 8 1 8 8 dq62 1 4 d q 6 3 9 v s s 6 4 v s s 8 9 ck2 1 14 vd d 139 dq35 164 d q 5 2 1 8 9 d q 5 9 1 5 v s s 4 0 v s s 6 5 d q 2 6 90 vss 1 1 5 a 10 140 dq39 165 d q 4 9 1 9 0 d q 6 3 1 6 v s s 4 1 d q 1 6 6 6 d q 3 0 9 1 /ck2 1 1 6 ba1 141 dq40 166 d q 5 3 1 9 1 vdd 1 7 d q 3 4 2 d q 2 0 6 7 d q 2 7 9 2 vd d 1 17 ba0 142 d q 44 167 vd d 1 9 2 vd d 1 8 d q 7 4 3 d q 1 7 6 8 d q 3 1 9 3 vd d 1 18 /r as 143 vd d 168 vd d 1 9 3 s d a 1 9 d q 8 4 4 d q 2 1 6 9 vd d 94 vd d 1 19 /w e 144 vd d 169 d q s 6 1 9 4 sa0 2 0 d q 1 2 4 5 v d d 7 0 v d d 9 5 c ke1 120 /c as 145 d q 41 170 d m 6 1 9 5 sc l 2 1 v d d 4 6 vd d 7 1 c b 0 96 c ke0 121 / s 0 146 d q 45 171 d q 5 0 1 9 6 sa1 2 2 v d d 4 7 d q s 2 7 2 c b 4 97 d u 122 / s 1 147 d q s5 172 d q 5 4 1 9 7 vd d s 2 3 d q 9 4 8 dm 2 7 3 c b 3 98 d u 123 d u 148 dm 5 173 v s s 1 9 8 sa2 2 4 d q 1 3 4 9 d q 1 8 7 4 c b 5 99 a12 124 d u 149 vss 174 v s s 1 9 9 vddi 2 5 d q s 1 5 0 d q 2 2 7 5 v s s 100 a1 1 125 vss 150 vss 175 d q 5 1 2 0 0 d u rev 2 apr . 2002 2
a-data a d ecb1608 pin d escript i on p i n n a m e f u nct i o n ck 0~ck 2, / c k 0 ~/ ck 0 2 s y s t em cl oc k a c t i ve on t he pos i t i v e edge t o s a m p l e al l i nput s . ck e 0 c l oc k e nabl e m a sks sy ste m cl o ck to fr e e z e operat i on f r om t he nex t c l oc k c y c l e. ck e s houl d be enabl ed at l eas t on c y c l e pri o r new c o m m and. di s abl e i nput buf f e rs f o r pow er dow n i n s t andby / c s 0 chi p s e l e c t di s abl es or e nabl es devi c e operat i on by m a s k i ng or enabl i ng al l i nput ex c ept ck , ck e and l(u)dqm a 0 ~a 1 1 a ddres s row / col u m n addres s are m u l t i p l e x ed on t he s a m e pi ns . b a 0 ~b a 1 b ank s s e l e c t s e l e c t s bank t o be ac t i vat ed duri ng row addres s l a t c h t i m e . s e l e c t s bank f o r read / w r i t e duri ng c o l u m n addres s l a t c h t i m e . dq0~dq63 dat a dat a i nput s / out put s are m u l t i p l e x ed on t he s a m e pi ns . dqs 0 ~dqs 7 dat a s t robe b i -di r ec t i onal dat a s t robe dm 0~7 dat a m a s k m a k e s dat a out put hi -z, / r a s row a ddres s s t robe lat c hes row addres s e s on t he pos i t i v e edge of t he clk w i t h /r as lo w / c a s col u m n a ddres s s t robe lat c hes col u m n addres s e s on t he pos i t i v e edge of t he clk w i t h /c as lo w / w e w r i t e e nabl e e nabl es w r i t e operat i on and row rec harge. v dd/ v s s p o w e r s uppl y/ ground p o w e r and ground f o r t he i nput buf f e rs and t he c o re l ogi c . v d dq p o w e r s uppl y p o w e r s uppl y f o r dqs v r e f p o w e r s uppl y ref e renc e p o w e r s uppl y f o r ref e renc e v d ds s p d p o w e r s uppl y s e ri al e e p rom pow er s uppl y sd a se r i a l d a t a i/o eepr o m se r i a l d a t a i/o sc l ser i al c l oc k eepr om c l oc k input sa0~2 addr es s in eepr o m e e p r om addr es s input v d di d v d d i dent i f i c at i on v dd i dent i f i c at i on f l ag nc no connec t i on thi s pi n i s rec o m m ended t o be l e f t no connec t i on on t he devi c e. rev 2 apr . 2002 3
a-data a d ecb1608 b l ock d i agram dq40 dq41 dq42 dq43 dq44 dq45 dq46 dq47 dq8 dq9 dq10 dq11 dq12 dq13 dq14 dq15 dq16 dq17 dq18 dq19 dq20 dq21 dq22 dq23 i/o 7 i/o 6 i/o 1 i/o 0 i/o 5 i/o 4 i/o 3 i/o 2 dq24 dq25 dq26 dq27 dq28 dq29 dq30 dq31 dq0 dq1 dq2 dq3 dq4 dq5 dq6 dq7 dq48 dq49 dq50 dq51 dq52 dq53 dq54 dq55 dq56 dq57 dq58 dq59 dq60 dq61 dq62 dq63 dq32 dq33 dq34 dq35 dq36 dq37 dq38 dq39 d4 d6 d7 d3 d2 d1 d0 d5 dqm /cs /cs /cs /cs /cs /cs /cs /cs0 /cs dqm dqm dqm dqm dqm dqm dqm d qm0 dqm1 dqm2 dqm3 dqm7 dqm6 dqm5 dqm4 /ras vss scl spd 47k ohms sa0 sa1 sa2 a 0 a 1 a 2 sda wp vcc /we /cas /ras : d0 ~d7 /we : d0 ~d7 /cas : d0 ~d7 a0~a12 ba0/ba1:d0~d7 ba0/ba1 a0~a12:d0~d7 d0~d7 d0~d7 ck : 2 sdrams ck : 2 sdrams ck : 2 sdrams ck : 2 sdrams cke : d0~d7 cke0 ck2 ck1 ck0 3.3 pf 3.3 pf 10 ohm 10 ohm 10 ohm i/o 7 i/o 6 i/o 1 i/o 0 i/o 5 i/o 4 i/o 3 i/o 2 i/o 7 i/o 6 i/o 1 i/o 0 i/o 5 i/o 4 i/o 3 i/o 2 i/o 7 i/o 6 i/o 1 i/o 0 i/o 5 i/o 4 i/o 3 i/o 2 i/o 7 i/o 6 i/o 1 i/o 0 i/o 5 i/o 4 i/o 3 i/o 2 i/o 7 i/o 6 i/o 1 i/o 0 i/o 5 i/o 4 i/o 3 i/o 2 i/o 7 i/o 6 i/o 1 i/o 0 i/o 5 i/o 4 i/o 3 i/o 2 i/o 7 i/o 6 i/o 1 i/o 0 i/o 5 i/o 4 i/o 3 i/o 2 rev 2 apr . 2002 4
a-data a d ecb1608 a b solut e m aximum r a t i ngs p a ram e t e r s y m bol v a l u e uni t v o l t age on any pi n rel a t i ve t o v s s v in , v out - 0 . 5 ~3. 6 v v o l t age on v dd s uppl y rel a t i ve t o v s s v dd - 1 . 0 ~3. 6 v v o l t age on v ddq s uppl y rel a t i ve t o v s s v ddq - 0 . 5 ~3. 6 v s t orage t e m perat ure t st g - 5 5 ~ + 1 5 0 : p o w e r di s s i p a t i on p d 8 w s hort c i rc ui t c u rrent i os 5 0 m a no te : p e rm anent devi c e dam age m a y oc c u r i f a b s o lute m a x i m u m ra ti ng are ex c eeded. func t i onal operat i on s houl d be res t ri c t ed t o rec o m m ended operat i ng c ondi t i on. e x pos ure t o higher t han rec o m m ended v o lt age f o r ex t ended periods of t i m e c ould af f e c t dev ic e reliabilit y . dc operating condition v o l t age ref e renc ed t o v s s = 0v , t a = 0 t o 70 : p a ram e t e r s y m bol m i n m a x uni t not e s uppl y vol t age v dd , v ddq 2 . 3 2. 7 v ref e renc e vol t age v ref v ddq / 2 -50m v v ddq / 2 +50m v v 1 t e rm i nat i on vol t age v tt v ref - 0. 0 4 v ref +0. 0 4 2 i nput l ogi c hi gh vol t age v ih v ref +0. 1 5 v ddq +0. 3 v 3 i nput l ogi c l o w vol t age v il - 0 . 3 v ref - 0. 1 5 v 3 out put l ogi c hi gh vol t age v oh v tt +0. 8 4 - v i oh =-16. 8m a out put l ogi c l o w vol t age v ol - v tt - 0. 8 4 v i ol =16. 8m a i nput vol t age level v in - 0 . 3 v ddq +0. 3 v i nput di f f erent i a l v o l t age v id 0 . 3 v ddq +0. 6 v 4 i nput c r os s i ng poi nt vol t age v ix 1 . 1 5 1. 3 5 v 5 i nput l eak age c u rrent i il - 2 2 ua out put l eak age c u rrent i ol - 5 5 ua no te : 1. i n c l udes d 25m v m a rgi n f o r dc of f s et on v ref , and a c o m b i ned t o t a l of d 50m v m a rgi n f o r al l a c noi s e and dc of f s e t on v ref , bandw i d t h l i m i t ed t o 20m hz. the dra m m u s t a c com m odat e dra m c u rrent s p i k e s o n v ref and i n t e rnal dra m noi s e c oupl ed t o v ref , bot h of w h i c h m a y res u l t i n v ref noi s e . v ref s houl d be de-c oupl ed w i t h an i nduc t anc e of 3nh. 2. v tt i s not appl i ed di rec t l y t o t he devi c e. v tt i s a s y s t em s uppl y f o r s i gnal t e rm i nat i on res i s t ors , i s ex pec t ed t o be s e t equal t o v ref , and m u s t t r ac k vari at i ons i n t he dc l e vel of v ref 3. thes e p a ra m e t e rs s houl d be t e st ed at t h e pi n on a c t ual c o m ponent s and m a y be c heck ed a t ei t her t he pi n o r t he p ad i n s i m u l a t i on. the a c and dc i nput s pec i f i c at i ons are rel a t i ve t o a v r e f envel op t hat has been bandw i d t h l i m i t ed t o 200m hz. 4. v id i s t he m agni t ude of t he di f f erenc e bet w een t he i nput l e vel on ck and t he i nput l e vel on / c k . 5. the val ue of v ix i s ex pec t ed t o e qual 0. 5*v ddq o f t he t r an sm i t t i ng devi c e and m u s t t r a c k vari at i ons i n t he dc l e vel of t he s a m e . rev 2 apr . 2002 5
a-data a d ecb1608 c a p acit a nce ta = 2 5 out put load circuit output load circuit (sstl_2) output z0=50 ? c load =30pf v ref =0.5*v ddq r t =50 ? v tt =0.5*v ddq d c c h aract erist i cs ii t a = 0 to 7 0
a-data a d ecb1608 a c c h aract erist i cs a d e c b 1608 pa r a m e te r s y m b o l mi n m a x uni t n o t e / c a s lat enc y = 2. 5 t c k 2 . 5 7. 5 sy ste m cl o ck cyc l e t i m e / c a s lat enc y = 2 t c k 2 10 1 2 n s cl oc k hi gh pul s e w i d t h t c hw 0. 4 5 0 . 5 5 tc k cl oc k l o w pul s e w i d t h t c l w 0. 4 5 0 . 5 5 tc k acce ss ti m e fo r m cl o ck tac - 0 .7 5 0 . 7 5 n s row c y c l e t i m e t r c 65 ns /r as to /c as d e l a y tr c d 2 0 ns r o w a c tiv e tim e tr as 4 5 1 2 0 k ns row prec harge t i m e t r p 2 0 ns row t o row bank ac t i ve del ay t r rd 1 5 ns w r i t e rec o very t i m e t w r 2 tc k ref r es h row c y c l e t i m e t r fc 7 5 ns col . a ddres s t o col . a ddres s del ay t c cd 1 tc k d q s o u t a cce ss tim e fr o m c k /c k td q s c k -0. 7 5 1 + 0 . 7 5 ns dat a s t robe edge t o out put dat a edge t d qs q + 0 . 5 ns c k to v a lid d q s- in td q s s 0. 7 5 1 . 2 5 tc k dqs ? i nput s e t up t i m e t w p r e s 0 ns dqs ? i nput hol d t i m e t w p r e h 0. 2 5 tc k a ddres s / com m and s e t up t i m e t i s 0. 9 ns a ddres s / com m and hol d t i m e t i h 0. 9 ns dqs f a l l i ng edge t o ck ri s i ng-s e t up t i m e t d ds 0. 2 tc k dqs f a l l i ng edge f r om ck ri s i ng-hol d t i m e t d s h 0. 2 tc k dqs i n hi gh l e vel w i d t h t d qs h 0. 3 5 tc k d q s in lo w le v e l w i d t h td qsl 0. 3 5 tc k d q s i n cy cl e ti m e td sc 0. 9 1 . 1 tc k read p r eam bl e t r p r e 0. 9 1 . 1 tc k read p o s t am bl e t r p s t 0. 4 0 . 6 tc k m ode regi s t er s e t c y c l e t i m e t m rd 1 5 ns p o w e r dow n ex i t t i m e t p de x 1 0 ns rev 2 apr . 2002 7
a-data a d ecb1608 command t r uth-t a ble com m a n d c k e n - 1 ck e n / c s / ra s / ca s / w e a d dr a 10/ a p b a m ode regi s t e r s e t h x l l l l op c o d e no operat i o n h x l h h h x b ank a c t i ve h x l l h h ra v read l read w i t h a u t o p r ec harge h x l h l h ca h v wr i t e l w r i t e w i t h a u t o p r ec harge h x l h l l ca h v p r ec harge a l l b ank h x p r ec harge s e l e c t b ank h x l l h l x l v b u rs t s t o p h x l h h l x a u t o ref r es h h h l l l h x e n t r y h l l l l h l h h h s e l f ref r es h ex i t l h h x x x x h x x x en tr y h l l h h h h x x x p r ec harge p o w e r dow n ex i t l h l v v v x h x x x en tr y h l l v v v activ e po w e r dow n e x i t l h x x x x x rev 2 apr . 2002 8
a-data a d ecb1608 package inf o rmat i on rev 2 apr . 2002 9
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